The present invention relates to an improvement in or relating to a variable frequency divider capable of generating a desired frequency division ratio and, more particularly, to a reference clock frequency divider feasible for a motor drive IC (Integrated Circuit), optical disk drive, hard disk drive or similar apparatus. The frequency divider to which the present invention pertains is capable of setting not only integral ratios but also decimal ratios without any circuit modification.
It is a common practice with a frequency divider to cascade binary counters or decimal counters. This kind of configuration has a problem that frequency division ratios available therewith are limited to integers. Today, in parallel with the progress in technologies, apparatuses in general are diversifying and require circuitry which is more complicated and features more functions. A current trend in the art is, therefore, toward a frequency divider capable of generating a broad range of frequency division ratios. Such frequency dividers broaden the applicability of a single multi-function apparatus when installed therein. In practice, however, since only some of the frequency division ratios available in an apparatus are used often, many of frequency dividers built in the apparatus are often left unused.
As stated above, the conventional frequency divider, implemented by cascaded binary or decimal counters, cannot generate frequency division ratios other than integral ratios.